When you have more than one PCI host bridge/PCI Express root complex in a system, such as a modern high end multi socket board (each processor package usually has an integrated PCIe root complex th...

The PCI local bus specification defines four active low, level trigerred interrupt signals - INT[A-D]# per device. On x86 machines, you have the IOAPIC and legacy 8259 interrupt controllers. The 82...